Career

Graduate Engineer Trainee (GET) – VLSI, Analog Mixed-Signal & Hardware Design

SBIT Inc. (USA) & SBIT Ltd. (Bangladesh)

Location: Bangladesh
Job Type: Full-Time
Experience: Fresh Graduates (0-1 Year)
Education: BS/MS in ECE, EEE, Electronics, VLSI, Microelectronics, Computer Engineering, Embedded Systems, or related disciplines.

About SBIT

SBIT Inc. (USA) and SBIT Ltd. (Bangladesh) are expanding their engineering teams and are seeking passionate, innovative, and motivated fresh graduates to join our Global Semiconductor Engineering Trainee Program.

This program provides structured training, mentorship from industry experts, and hands-on exposure to cutting-edge semiconductor and hardware design projects. Selected candidates will have the opportunity to build careers in ASIC, SoC, Analog Mixed-Signal IC, and Hardware Design domains while working in a collaborative international environment.

For more, see: www.sbit-us.com

Specialization Tracks

Successful candidates will be assigned to one of the following engineering domains based on their skills, interests, and business needs:

  • RTL Design & Verification
  • Physical Design
  • Static Timing Analysis (STA)
  • Analog & Mixed-Signal IC Design
  • PCB Design

Key Responsibilities

1. RTL Design & Verification

  • Develop RTL designs using Verilog/SystemVerilog.
  • Create and execute testbenches for functional verification.
  • Perform simulation, debugging, and coverage analysis.
  • Collaborate with design teams to identify and resolve functional issues.
  • Support ASIC/FPGA development projects.

2. Physical Design

  • Participate in floorplanning, placement, clock tree synthesis (CTS), and routing activities.
  • Perform physical verification and design optimization.
  • Analyze congestion, timing, power, and area metrics.
  • Support timing closure and sign-off implementation activities.

3. Static Timing Analysis (STA)

  • Perform timing analysis and timing closure.
  • Analyze setup, hold, recovery, and removal violations.
  • Review timing reports and debug timing issues.
  • Collaborate with RTL and Physical Design teams to achieve timing sign-off.

4. Analog & Mixed-Signal IC Design

  • Assist in the design and simulation of analog and mixed-signal circuits.
  • Work on analog building blocks such as amplifiers, current mirrors, voltage references, LDOs, PLLs, ADCs, and DACs.
  • Perform pre-layout and post-layout simulations.
  • Support silicon validation and performance characterization activities.
  • Collaborate with digital and physical design teams on mixed-signal SoC projects.

5. PCB Design

  • Assist in schematic capture and PCB layout development.
  • Support component selection, placement, and routing activities.
  • Prepare manufacturing and assembly documentation.
  • Participate in design reviews and hardware validation.
  • Ensure compliance with quality, reliability, and manufacturability standards.

Qualifications

  • Bachelor’s or Master’s degree in Electronics-related disciplines.
  • Strong understanding of Digital Electronics and VLSI fundamentals.
  • Good analytical and problem-solving abilities.
  • Strong communication and teamwork skills.
  • Passion for semiconductor, IC, and hardware design technologies.
  • Willingness to learn and work with advanced EDA tools and methodologies.

Preferred Technical Skills

For RTL Design & Verification

  • Verilog/SystemVerilog
  • UVM fundamentals
  • Digital Design and FSM concepts
  • Linux/Unix environment

For Physical Design

  • ASIC Design Flow
  • CMOS Fundamentals
  • Cadence Innovus or Synopsys ICC2 exposure
  • DRC/LVS concepts

For Static Timing Analysis

  • Timing Analysis Fundamentals
  • Setup/Hold Analysis
  • Synopsys PrimeTime exposure
  • SDC Constraints

For Analog & Mixed-Signal Design

  • Analog Circuit Design Fundamentals
  • SPICE-Based Simulation
  • CMOS Analog Design
  • Cadence Virtuoso/Spectre exposure
  • ADC, DAC, PLL, and LDO concepts

For PCB Design

  • Schematic Design and PCB Layout
  • Altium Designer, Cadence Allegro, or KiCad exposure
  • Signal Integrity and Power Integrity basics
  • EMI/EMC fundamentals

Additional Advantage

  • Cadence EDA tools and undergrad VLSI projects, Python, TCL, Perl, or SKILL scripting knowledge.
  • Internship or academic project experience in VLSI, Semiconductor, FPGA, Embedded Systems, or Hardware Design.

 

Eligibility Criteria

  • Fresh graduates or candidates with up to 1 year of experience.
  • Graduating in 2024, 2025, or 2026.
  • Strong academic performance throughout studies.
  • Demonstrated interest in semiconductor and hardware engineering through coursework, projects, or internships.

What We Offer

  • Comprehensive technical training program.
  • Mentorship from experienced semiconductor professionals.
  • Hands-on experience with industry-standard EDA tools.
  • Exposure to global engineering projects.
  • Career growth opportunities in advanced semiconductor technologies.
  • Collaborative and innovation-driven work environment.
  • Opportunity to work with teams across the USA and Bangladesh.

Why Join SBIT?

Join a fast-growing global technology organization and become part of the next generation of semiconductor innovators. At SBIT, you’ll gain real-world experience, industry exposure, and the technical foundation required to build a successful career in VLSI, Analog Mixed-Signal IC Design, ASIC Development, and Hardware Engineering.

Apply today and kick-start your career with SBIT’s Global Semiconductor Engineering Trainee Program.